Lead Design For Test (DFT) Engineer
Unique opportunity to join an established international company in their US expansion. Working from the US headquarters, you will have the ability to be an impact player working with other exceptionally talented people. The Lead DFT Engineer will be a key person in this growing leader in ASIC and SOC.
- Support and work closely with automotive customers (with special emphasis on in-system test using LBIST & MBIST) and non-automotive customers in defining the ASIC DFT requirements and specifications
- Development and Implementation of DFT Architecture
- Design and Verification of DFT logic and components
- Generation of structural test vectors, analysis and coverage improvement
- Generation of timing constraints for the various DFT modes
- Work with design and implementation teams on DFT STA, logical, physical and power issues
- Support ATE team with test vector porting, diagnosis and physical failure analysis
Great company with a ton of IP, growth opportunity.
- BS/MS in Electrical Engineering, Computer Science or related field
- Minimum of 15 years hands-on work experience in ASIC DFT design. Experience in an SoC product development organization or in an ASIC vendor company along with customer facing experience preferable
- Strong working knowledge of Chip design, Verilog/System Verilog and design verification
- Expertise and knowledge about DFT methodologies, industrial standards and practices
- Hands-on experience with DFT circuit insertion and validation for scan, at-speed, MBIST and Boundary scan.
- Experience with DFT/ATPG EDA tools like Tessent/TestMax/Modus. Experience with simulators and waveform debug tools.
- Experience with STA tools like Primetime, SDF generation and Gate-level simulations
- Understanding and expert handling of Verilog HDL based Netlists, design libraries and Scripting (Perl/Tcl/)
- experience in ASIC/SOC services company desired
- small company/organization experience desired
- international or Japanese experience a plus